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february 2011 doc id 16101 rev 6 1/29 1 stm6502, stm6503 stm6504, stm6505 dual push-button smart reset tm with user-adjustable setup delays features dual smart reset push-button inputs with extended reset setup delay adjustable smart reset setup delay (t src ): by external capacitor or three-state logic (product options): t src = 2, 6, 10 s (min.) power-on reset single rst output, active-low, open-drain factory-programmable thresholds to monitor v cc in the range of 1.575 to 4.625 v typ. operating voltage 1.0 v (active-low output valid) to 5.5 v low supply current operating temperature: industrial grade ?40 c to +85 c tdfn8 package: 2 mm x 2 mm x 0.75 mm rohs compliant applications mobile phones, smartphones e-books mp3 players games portable navigation devices any application that requires delayed reset push-button(s) response for improved system stability tdfn8 (dg) 2 mm x 2 mm table 1. device summary part number voltage inputs smart reset inputs t src programming reset or power good outputs package v cc v bat sr0 sr1 sre immediate, independent ext. src pin three- state input tsr rst bld stm6502 (1) ??? ? ? tdfn-8l stm6503 ??? ?? tdfn-8l stm6504 (1) ?? ? ?? tdfn-8l stm6505 ?? ? ? ? ? ? tdfn-8l 1. contact local st sales office for availability. www.st.com
contents stm6502, stm6503, stm6504, stm6505 2/29 doc id 16101 rev 6 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 smart reset devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.2 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.1 power supply (v cc ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.2 ground (v ss ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.3 primary smart reset input (sr0 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.4 secondary smart reset input (sr1 ) . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.2.5 edge-triggered smart reset input (sre pin) ? stm6504 only . . . . . . . 11 1.2.6 adjustable delay of smart reset input (src pin) ? stm6502 and stm6505 only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.2.7 programmable smart reset input delay (tsr pin) ? stm6503 and stm6504 only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1.2.8 reset output (rst ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 1.2.9 battery monitoring input (v bat ) ? stm6505 only . . . . . . . . . . . . . . . . . 12 1.2.10 battery low detect output (bld ) ? stm6505 only . . . . . . . . . . . . . . . . . 12 2 typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 dc and ac parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 6 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 7 package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
stm6502, stm6503, stm6504, stm6505 list of tables doc id 16101 rev 6 3/29 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. t src programmed by an ideal external capacitor ? stm6502 and stm6505 . . . . . . . . . . 11 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 5. operating and measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 6. dc and ac characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 7. v cc voltage thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 table 8. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data . . . . . . . . . . . . . 21 table 9. parameter for landing pattern - tdfn ? 8-lead 2 x 2 mm package . . . . . . . . . . . . . . . . . . 22 table 10. carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 11. reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 table 12. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 13. package marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 table 14. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
stm6502, stm6503, stm6504, stm6505 list of figures doc id 16101 rev 6 4/29 list of figures figure 1. logic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. block diagram - stm6502, stm6503, stm6504 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 4. block diagram - stm6505 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5. single-button smart reset typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. dual-button smart reset typical hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7. stm6502, stm6503 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 8. stm6504 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 9. stm6505 timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 10. supply current (i cc ) vs. temperature (stm6505) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 11. smart reset delay (t src ) vs. temperature, c src = 0.62 f (stm6505) . . . . . . . . . . . . . . 13 figure 12. reset threshold (v rst ) vs. temperature, ?s? threshold option, v cc falling (stm6505) . . . 14 figure 13. v bat monitoring threshold (v batth ) vs. temperature, falling (stm6505) . . . . . . . . . . . . . . 14 figure 14. ac testing input/output waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 15. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline . . . . . . . . . . . . . . . . . . . . . 21 figure 16. landing pattern - tdfn ? 8-lead 2 x 2 mm without thermal pad . . . . . . . . . . . . . . . . . . . . 22 figure 17. carrier tape . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 18. reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 19. tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 20. pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 figure 21. package marking, top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
stm6502, stm6503, stm6504, stm6505 description doc id 16101 rev 6 5/29 1 description stm6502 has two combined smart reset inputs (sr0 and sr1 ) with delayed smart reset setup time (t src ) programmed by an external capacitor on the src pin. stm6503 is similar to stm6502, has two combined delayed smart reset inputs (sr0 , sr1 ) and three user-selectable delayed smart reset setup time (t src ) options of 2 s, 6 s and 10 s through a three-state tsr input pin: when connected to ground, t src = 2 s; when left open, t src = 6 s; when connected to v cc , t src = 10 s (all the times are minimum). stm6504 has two independent smart reset inputs. sr0 provides the delayed smart reset setup time (t src ) function with three user-selectable t src options through a three-state tsr input pin: when connected to ground, t src = 2 s; when left open, t src = 6 s; when connected to v cc , t src = 10 s (all the times are minimum). sre provides instant reset. sre is edge-triggered with a special debounce time (t debounce = 240 ms min.) at the falling edge after a valid reset period. stm6505 has two combined delayed smart reset inputs (sr0 , sr1 ) and provides an adjustable reset delay setup time via an external capacitor connected to the src pin. the rst output depends also on the v cc monitoring threshold. stm6505 also provides independent low battery detect (bld ) output controlled by the secondary external input voltage v bat . v bat is monitored for low voltage and provides an indication on the battery low detect output pin (bld ). v bat threshold is 1.25 v, fixed, and an external resistor divider is to be used to set the actual battery voltage threshold. v bat threshold hysteresis is 8 mv typ. (16 mv max.). v bat is voltage monitoring input only, the device is powered only from the v cc pin; v cc must be 1.575 v for proper operation of the v bat comparator. 1.1 smart reset devices the smart reset device family stm65xx provides a useful feature that ensures inadvertent short reset push-button closures do not cause system resets. this is done by implementing extended smart reset input delay (t src ). once the valid smart reset input levels and setup delay are met, the device generates an output reset pulse with user-programmable timeout period (t rec ). the smart reset inputs can be also connected to the applications interrupt to allow the control of both the interrupt pin and the hard reset functions. if the push-buttons are closed for a short time, the processor is only inte rrupted. if the system still does not respond properly, holding the push-buttons for the extended setup time (t src ) causes hard reset of the processor through the reset outputs. the smart reset feature helps significantly increase system stab ility. the stm65xx family of smart reset devices consists of low current microprocessor reset circuits targeted at applications such as mp3 players, navigation, smartphones or mobile phones; generally any application that requires delayed reset push-button(s) response for improved system stability. the stm65xx devices feature single or dual smart reset inputs (sr). the delayed smart reset setup time (t src ) options of 2 s, 6 s and 10 s (all min.) are adjustable by an external capacitor on the src pin or selectable by three-state logic. the delayed setup period ignores switch closures shorter than t src , thus preventing unwanted resets.
description stm6502, stm6503, stm6504, stm6505 6/29 doc id 16101 rev 6 the stm65xx devices have active-low (optionally active-high) open-drain reset (rst ) output(s) with or without internal pull-up resistor or push-pull as output options, with factory- programmed or capacitor-adjustable or push-buttons defined output reset pulse duration, with or without power-on reset function. some devices also have an undervoltage monitoring feature: the reset output is also asserted when the monitored supply voltage v cc drops below the specified threshold. the reset output remains asserted for the reset timeout period (t rec ) after the monitored supply voltage goes above the specified threshold. figure 1. logic diagrams figure 2. pin connections am00378 v cc sr0 rst v ss stm6502 sr1 sr0 sr1 src v cc rst v ss stm6503 v cc rst v ss stm6504 sr0 sre v cc bld rst v ss stm6505 sr1 sr0 src v bat tsr tsr am00379 src nc nc 1 2 3 stm 6502 4 8 7 6 5 rst v ss v cc sr1 sr0 tsr nc nc 1 2 3 stm 6503 4 8 7 6 5 rst v ss v cc sr0 sr1 tsr nc nc 1 2 3 stm 6504 4 8 7 6 5 rst v ss v cc sre sr0 bld src v bat 1 2 3 stm 6505 4 8 7 6 5 rst v ss v cc sr1 sr0
stm6502, stm6503, stm6504, stm6505 description doc id 16101 rev 6 7/29 table 2. signal names symbol input/ output description rst output open-drain reset output, active-low. bld output battery low detect output, active-low, open-drain. stm6505 only. sr0 input primary push-button smart reset input. active-low, with or without internal 65 k pull-up to v cc (product options). sr1 input secondary push-button smart reset input - combines with the primary push- button reset to provide setup delay time before reset. active-low, with or without internal 65 k pull-up to v cc (product options). sre input secondary push-button smart reset input - provides instant smart reset. sre is edge-triggered with a special debounce time (t debounce = 240 ms min.) at the falling edge after a valid reset period. active-high, no internal pull-up to v cc . stm6504 only. src input smart reset input delay setup control: connect to an external capacitor to adjust the delay setup time (t src ). stm6502 and stm6505 only. tsr input a three-state smart reset input delay setup control. when connected to ground, t src = 2 s; when left open, t src = 6 s; when connected to v cc , t src = 10 s (all times are minimum). tsr is a dc-type input, intended to be either permanently grounded, permanently connected to v cc or permanently left open. if left open, for improved system glitch immunity it is strongly recommended to connect a 0.1 f decoupling ceramic capacitor between the tsr and v ss pins. stm6503 and stm6504 only. v cc supply supply voltage input. power supply for the device and an input for the monitored supply voltage. a 0.1 f decoupling ceramic capacitor is recommended to be connected between the v cc and v ss pins. v bat input battery voltage monitoring input. stm6505 only. v ss supply ground nc no connect (not bonded); should be connected to v ss .
description stm6502, stm6503, stm6504, stm6505 8/29 doc id 16101 rev 6 figure 3. block diagram - stm6502, stm6503, stm6504 1. stm6504 only: sr0 and sre are working independently. sre is edge-triggered and has a special debounce time (t debounce = 240 ms min.) at the falling edge after a valid reset period. figure 4. block diagram - stm6505 v cc v rst compare sr0 src (stm6502) tsr (stm6503, stm6504) rst t rec generator logic sr1 (sre stm6504 only) (1) logic am00352a !-b 6 ## 6 234 #/- 0!2% 32 32# 6 ## 234 t 2%# gene rator ,ogic 6 "!4 6 "!44( #/- 0!2% 32 ",$
stm6502, stm6503, stm6504, stm6505 description doc id 16101 rev 6 9/29 figure 5. single-button smart reset typical hookup figure 6. dual-button smart reset typical hookup !-b 32 432 32 234 6 33 6 ## ).4 .-) 6 33 053( "544/. 37)4#( -#5 2%3%4 34- 6 ## 6 ## !-6 6 ## 32 32 432 234 6 33 6 ## ).4 .-) 6 33 053( "544/. 37)4#( -#5 053( "544/. 37)4#( 2%3%4 34- 6 ##
description stm6502, stm6503, stm6504, stm6505 10/29 doc id 16101 rev 6 1.2 pin descriptions 1.2.1 power supply (v cc ) this pin is used to provide the power to the device and to monitor the power supply. a 0.1 f decoupling ceramic capacitor is recommended to be connected between the v cc and v ss pins. 1.2.2 ground (v ss ) this is the supply ground for the device. 1.2.3 primary smart reset input (sr0 ) the primary push-button smart reset input, active-low pin is connected to the first push- button switch. 1.2.4 secondary smart reset input (sr1 ) the secondary push-button smart reset input, active-low pin is connected to the second push-button switch. keeping both smart reset inputs sr0 and sr1 active for longer than t src activates the reset output pulse. figure 7. stm6502, stm6503 timing reset is asserted ?low? right after the smart reset setup delay (t src ) has been met and returns to high after the t rec period. am00327 rst sr0 sr1 t src t rec
stm6502, stm6503, stm6504, stm6505 description doc id 16101 rev 6 11/29 1.2.5 edge-triggered smart reset input (sre pin) ? stm6504 only the sre pin is active-high, immediate and independent reset input that includes an edge trigger with debounce delay t debounce on the falling edge. note: the triggering edge must be a high-to-low or low-to-high transition with a slew-rate faster than 1 v/s typ. figure 8. stm6504 timing 1.2.6 adjustable delay of smart reset input (src pin) ? stm6502 and stm6505 only this pin controls the setup time before the push-button action is validated by the reset output. it is connected to an external capacitor (c src ), which is tied to ground to provide the desired value of the setup time (t src ). calculated t src and c src examples are given in ta bl e 3 . refer also to ta b l e 6 . am00328v2 t rec sr0 t < t src => no output response t src t < t debounce => t rec timer reset independent rst sre no debounce t rec t debounce (rising edges within t debounce are ignored) t rec table 3. t src programmed by an ideal external capacitor ? stm6502 and stm6505 calculated c src value [f] setup delay t src [s] (1)(2) 1. at 25 c. example calculations based on an ideal capacitor. during application design and component selection it should be considered that the current flowing into the external t src programming capacitor (c src ) is on the order of 100 na, therefore a low-leakage capacitor (ceramic or film capacitor) should be used and placed as close as possible to the src pin. also an adequate low-leakage pcb environment should be ensured to prevent t src accuracy from being affected. a recommended minimum value of c src is 0.01 f. 2. in case of repeated activations of the t src timer, an interval of 10 ms min. is needed between the activations to fully discharge c src , so that the next t src is as specified. closest common c src value [f] min. typ. max. 0.2 2 2.5 3.0 0.22 0.3 3 3.75 4.5 0.33 0.6 6 7.5 9 0.56 1 10 12.5 15 1
description stm6502, stm6503, stm6504, stm6505 12/29 doc id 16101 rev 6 1.2.7 programmable smart reset input delay (tsr pin) ? stm6503 and stm6504 only the tsr pin allows the user to program the setup time before the push-button action is validated by the reset output. it is controlled by different voltage levels on the three-state tsr input pin: when connected to ground, t src = 2 s; when left open, t src = 6 s; when connected to v cc , t src = 10 s (all times are minimum). tsr is a dc-type input, intended to be either permanently grounded, permanently connected to v cc or permanently left open. if it is left open, for improved system glitch immunity it is strongly recommended to connect a 0.1 f decoupling ceramic capacitor between the tsr and v ss pins. 1.2.8 reset output (rst ) rst is the active-low, open-drain reset output in the smart reset family. 1.2.9 battery monitoring input (v bat ) ? stm6505 only v bat is an input for monitoring the battery voltage. v bat threshold is 1.25 v, fixed, and an external resistor divider is to be used to set the actual battery voltage threshold. 1.2.10 battery low detect output (bld ) ? stm6505 only the battery low detect output is controlled by the v bat voltage monitoring input and is active-low, open-drain, with no pull-up. figure 9. stm6505 timing am00329 rst bld sr0 sr1 t src t rec v bat v batth
stm6502, stm6503, stm6504, stm6505 typical operating characteristics doc id 16101 rev 6 13/29 2 typical operating characteristics figure 10. supply current (i cc ) vs. temperature (stm6505) figure 11. smart reset delay (t src ) vs. temperature, c src = 0.62 f (stm6505) 0 0.5 1 1.5 2 2.5 3 -60 -40 -20 0 20 40 60 80 100 120 140 temperature [c] i cc [a] 5.5 v 2 v 5 v 3 v am04 88 6v1 6.2 6.7 7.2 7.7 8.2 8.7 9.2 -60 -40 -20 0 20 40 60 80 100 120 140 temperature [c] t src [s] 5.75 v 5.5 v 3.3 v am04 88 7v1
typical operating characteristics stm6502, stm6503, stm6504, stm6505 14/29 doc id 16101 rev 6 figure 12. reset threshold (v rst ) vs. temperature, ?s? threshold option, v cc falling (stm6505) figure 13. v bat monitoring threshold (v batth ) vs. temperature, falling (stm6505) 2.85 2.87 2.89 2.91 2.93 2.95 2.97 2.99 -60 -40 -20 0 20 40 60 80 100 120 140 temperature [c] v rst [v] am04 888 v1 1.225 1.23 1.235 1.24 1.245 1.25 1.255 1.26 1.265 1.27 1.275 -60 -40 -20 0 20 40 60 80 100 120 140 temperature [c] v batth [v] 5.75 v 5.5 v 3.3 v 2 v 1.58 v am04 88 9v1
stm6502, stm6503, stm6504, stm6505 maximum ratings doc id 16101 rev 6 15/29 3 maximum ratings stressing the device above the rating listed in table 4: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 4. absolute maximum ratings symbol parameter value unit t stg storage temperature (v cc off) ?55 to +150 c t sld (1) 1. reflow at peak temperature of 260 c. the time above 255 c must not exceed 30 seconds. lead solder temperature for 10 seconds 260 c ja thermal resistance (junction to ambient) tdfn8 149.0 c/w v io input or output voltage ?0.3 to 5.5 (2) 2. for inputs or outputs with internal pull-up resistors and push-pull type outputs ?0.3 to v cc +0.3 v only. v v cc supply voltage ?0.3 to 7 v
dc and ac parameters stm6502, stm6503, stm6504, stm6505 16/29 doc id 16101 rev 6 4 dc and ac parameters this section summarizes the operating measurement conditions, and the dc and ac characteristics of the device. the parameters in the dc and ac characteristics tables that follow, are derived from tests performed under the measurement conditions summarized in table 5: operating and measurement conditions . designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters. figure 14. ac testing input/output waveforms table 5. operating and measurement conditions parameter value unit v cc supply voltage 1.0 to 5.5 v ambient operating temperature (t a ) ?40 to +85 c input rise and fall times 5ns input pulse voltages 0.2 to 0.8 v cc v input and output timing ref. voltages 0.3 to 0.7 v cc v 0.8 v cc 0.2 v cc 0.7 v cc 0.3 v cc am00478
stm6502, stm6503, stm6504, stm6505 dc and ac parameters doc id 16101 rev 6 17/29 table 6. dc and ac characteristics symbol parameter test conditions (1) min. typ. (2) max. unit v cc supply voltage range reset output valid - active-low 1.0 5.5 v i cc supply current (inputs in their inactive state, t rec and t src counter is inactive) stm6502 v cc = 5.0 v 1.2 a v cc = 3.0 v (3) 1.1 a stm6503 v cc = 5.0 v, tsr left open 4 5.8 a v cc = 3.0 v, tsr left open (3) 3a stm6504 v cc = 5.0 v, tsr left open 4 5.8 a v cc = 3.0 v, tsr left open (3) 3a stm6505 v cc = 5.0 v 2.3 3.3 a v cc = 3.0 v (3) 2.2 a output characteristics v ol reset output voltage low (reset asserted: rst , bld ) v cc 4.5 v, sinking 3.2 ma 0.3 v v cc 3.3 v, sinking 2.5 ma 0.3 v v cc 1.0 v, sinking 0.1 ma 0.3 v t rec reset timeout delay, factory-programmed option a 140 210 280 ms option b 240 360 480 ms v cc monitoring reset thresholds v rst fixed voltage trip point for v cc monitoring (refer to table 7 ) ?40 to +85 c v rst ?2.5% v rst v rst +2.5% v 25 c v rst ?2.0% v rst v rst +2.0% v v hyst hysteresis of v rst l, m 0.5% t, s, r, z, y, w, v 1% v cc to reset delay v cc falling from (v rst + 100 mv) to (v rst - 100 mv) at 10 mv/s (4) 20 s v bat monitoring v batth fixed v bat monitoring threshold stm6505 only 1.225 1.25 1.275 v v bathyst v batth hysteresis stm6505 only 8 16 mv i li(vbat) v bat input leakage current stm6505 only ?100 10 100 na
dc and ac parameters stm6502, stm6503, stm6504, stm6505 18/29 doc id 16101 rev 6 smart reset inputs v il sr0 , sr1 , sre input voltage low v ss ?0.3 0.3 v cc v v ih sr0 , sr1 , sre input voltage high 0.7 v cc 5.5 v i li(sr) input leakage current, sr and sre inputs option without internal pull-up resistor ?1 +1 a i li(tsr) input leakage current, tsr input stm6503 and stm6504 only ?5 +7 a r pui internal pull-up resistor, input (optional - refer to table 12 ) 65 k t debounce sre input falling edge debounce time stm6504 only 240 360 480 ms smart reset delay t src (5) capacitor-programmable smart reset setup time, stm6502 and stm6505. refer to ta b l e 3 . t a = 25 c 10 x c src (f) 12.5 x c src (f) 15 x c src (f) s t src (5) tsr pin-programmable smart reset setup time, stm6503 and stm6504. tsr = v ss 22.5 3s tsr = floating (6) 67.5 9s tsr = v cc 10 12.5 15 s 1. valid for ambient operating temperature: t a = ?40 to +85 c; v cc = 1.0 to 5.5 v (except where noted). 2. typical value is at 25 c and v cc = 3.3 v unless otherwise noted. 3. for devices with v rst < 3.0 v. 4. guaranteed by design. 5. input glitch immunity is equal to t src (when both sr inputs are low, otherwise infinite). stm6502, stm6503, stm6505 only. 6. if left open, for improved system glitch immunity it is strongly recommended to connect a 0.1 f decoupling ceramic capacitor between the tsr and v ss pins. table 6. dc and ac characteristics (continued) symbol parameter test conditions (1) min. typ. (2) max. unit
stm6502, stm6503, stm6504, stm6505 dc and ac parameters doc id 16101 rev 6 19/29 . table 7. v cc voltage thresholds v cc monitoring threshold v rst typ. 2.5% (?40 c to +85 c) 2.0% (25 c) unit min. max. min. max. l (falling) 4.625 4.509 4.741 4.533 4.718 v m (falling) 4.375 4.266 4.484 4.288 4.463 v t (falling) 3.075 2.998 3.152 3.014 3.137 v s (falling) 2.925 2.852 2.998 2.867 2.984 v r (falling) 2.625 2.559 2.691 2.573 2.678 v z (falling) 2.313 2.255 2.371 2.267 2.359 v y (falling) 2.188 2.133 2.243 2.144 2.232 v w (falling) 1.665 1.623 1.707 1.632 1.698 v v (falling) 1.575 1.536 1.614 1.544 1.607 v
package mechanical data stm6502, stm6503, stm6504, stm6505 20/29 doc id 16101 rev 6 5 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
stm6502, stm6503, stm6504, stm6505 package mechanical data doc id 16101 rev 6 21/29 figure 15. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package outline table 8. tdfn ? 8-lead 2 x 2 x 0.75 mm, 0.5 mm pitch package mechanical data symbol dimension (mm) dimension (inches) min. nom. max. min. nom. max. a 0.70 0.75 0.80 0.028 0.030 0.031 a1 0.00 0.02 0.05 0.000 0.001 0.002 b 0.15 0.20 0.25 0.006 0.008 0.010 d bsc 1.9 2.00 2.1 0.075 0.079 0.083 e bsc 1.9 2.00 2.1 0.075 0.079 0.083 e 0.50 0.020 l 0.45 0.55 0.65 0.018 0.022 0.026 e l bottom view 8 5 pin#1 id 1 pin 1 index area 4 b e 0.10 c a a1 plane seat ing top view 2x 2x d pin 1 index area 0.10 c 0.10 c 0.08 c 0.10 c a b b a c 8070540_a side view
package mechanical data stm6502, stm6503, stm6504, stm6505 22/29 doc id 16101 rev 6 figure 16. landing pattern - tdfn ? 8-lead 2 x 2 mm without thermal pad table 9. parameter for landing pattern - tdfn ? 8-lead 2 x 2 mm package parameter description dimension (mm) min. nom. max. l contact length 1.05 ? 1.15 b contact width 0.25 ? 0.30 e max. land pattern y-direction ? 2.85 ? e1 contact gap spacing ? 0.65 ? d max. land pattern x-direction ? 1.75 ? p contact pitch ? 0.5 ? am00441 d p e1 e l b
stm6502, stm6503, stm6504, stm6505 package mechanical data doc id 16101 rev 6 23/29 figure 17. carrier tape t k 0 p 1 a 0 b 0 p 2 p 0 center lines of cavity w e f d top cover tape user direction of feed am03073v2 table 10. carrier tape dimensions package w d e p 0 p 2 fa 0 b 0 k 0 p 1 tunit bulk qty. tdfn8 8.00 +0.30 ?0.10 1.50 +0.10/ ?0.00 1.75 0.10 4.00 0.10 2.00 0.10 3.50 0.05 2.30 0.05 2.30 0.05 1.00 0.05 4.00 0.10 0.250 0.05 mm 3000
package mechanical data stm6502, stm6503, stm6504, stm6505 24/29 doc id 16101 rev 6 figure 18. reel dimensions table 11. reel dimensions tape sizes a max. b min. c d min. n min. g t max. 8 mm 180 (7 inches) 1.50 13.0 +/? 0.20 20.20 60 8.4 +2/?0 14.40 a d b c n t am00443 40 mm min. acces hole at slot location tape slot in core for tape start 25 mm min width full radius g measured at hub
stm6502, stm6503, stm6504, stm6505 package mechanical data doc id 16101 rev 6 25/29 figure 19. tape trailer/leader figure 20. pin 1 orientation note: 1 drawings are not to scale. 2 all dimensions are in mm, unless otherwise noted. leade r trailer 10 0 mm min. start 160 mm min. 400 mm min. end am00444 to p cover tape user direction of feed sealed with cover tape no components no components components am00442 user direction of feed
part numbering stm6502, stm6503, stm6504, stm6505 26/29 doc id 16101 rev 6 6 part numbering for device options currently available refer to ta bl e 1 3 . for other options, voltage threshold values etc. or for more information on any aspect of this device, please contact the st sales office nearest you. table 12. ordering information scheme example: stm6505 w c a b dg 6 f device type stm6502 (1) stm6503 stm6504 (1) stm6505 reset (v cc monitoring) threshold voltage (v rst ), typ., falling l = 4.625 v s = 2.925 v r = 2.625 v z = 2.313 v w = 1.665 v v = 1.575 v smart reset setup delay (t src ); presence of internal input pull-up on all smart reset inputs (srx , sre) a = user-programmable (external capacitor); no input pull-up c = user-programmable (external capacitor); 65 k input pull-up e = 2 or 6 or 10 s min., user-programmable (three-state); no input pull-up f = 2 or 6 or 10 s min., user-programmable (three-state); 65 k input pull-up output type a = open-drain, no pull-up, active-low reset timeout period (t rec ) a = 140 ms min. b = 240 ms min. package dg = tdfn8 2 x 2 x 0.75 mm, 0.5 mm pitch temperature range 6 = ?40 c to +85 c shipping method f = ecopack ? package, tape and reel 1. contact local st sales office for availability.
stm6502, stm6503, stm6504, stm6505 package marking doc id 16101 rev 6 27/29 7 package marking table 13. package marking figure 21. package marking, top view part number t src delay control smart reset inputs (1) 1. al = active-low, ah = active-high, pu = with internal pull-up resistor, od = open-drain. v rst rst output (1) t rec option bld output (1) topmark stm6503reaadg6f tsr al r al, od a ? 3rg STM6503SEAADG6F tsr al s al, od a ? 3sg stm6503veaadg6f tsr al v al, od a ? 3vg stm6504seabdg6f (2) 2. contact local st sales office for availability. tsr al s al, od b ? 4sg stm6505scabdg6f c src al, pu s al, od b al, od 5sk stm6505rcabdg6f c src al, pu r al, od b al, od 5rk stm6505wcabdg6f c src al, pu w al, od b al, od 5wk am00479 a bc d e topmark a = dot (pin 1 reference) b = assembly plant (p) c = assembly year (y, 0-9): 9 = 2009 etc. d = assembly work week (ww, 01 to 52): 20 = ww20 etc. e = marking area (topmark)
revision history stm6502, stm6503, stm6504, stm6505 28/29 doc id 16101 rev 6 8 revision history table 14. document revision history date revision changes 31-aug-2009 1 initial release. 06-nov-2009 2 updated applications , section 1 , section , figure 3 to figure 6 updated and moved to section , updated ta b l e 1 , ta b l e 2 , ta b l e 3 , ta b l e 4 , ta b l e 6 , ta b l e 1 2 , section 1.2.3 , section 1.2.7 , section 1.2.9 , section 5 , added package footprint, tape and reel information, and section 7 . 15-jan-2010 3 updated features , section 1 , section 1.2.6 , ta ble 1 , ta b l e 2 , figure 5 , figure 6 , ta b l e 3 , ta ble 6 , ta b l e 1 2 , table 13 , removed table 4. 01-mar-2010 4 updated title of datasheet, features , applications , ta ble 1 , 2 , 6 , 12 , footnote 5 of ta b l e 6 ; updated figure 3 , 4 ; added section 2: typical operating characteristics ; minor textual and formatting changes. 21-jun-2010 5 updated features , section 1 , figure 8 , footnote 1 and 2 of ta b l e 3 , updated ta ble 4 , added footnote 2 to ta b l e 4 , ta ble 6 , added footnote 6 to ta ble 6 , updated tab le 6 to ta b l e 9 , and added footnote 2 of ta ble 1 3 . 09-feb-2011 6 reformatted ta b l e 1 , updated ta b l e 6 , added stm6503reaadg6f and STM6503SEAADG6F device to table 13 , corrected typo in ta b l e 1 3 .
stm6502, stm6503, stm6504, stm6505 doc id 16101 rev 6 29/29 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at an y time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2011 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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